Arista Compatible QSFP-100G-DR-A-FL Quick Spec:

A picture containing tool, scissors Description automatically generated

Part Number: QSFP-100G-DR-A-FL

QSFP-100G-DR-A-EXT-FL QSFP-100G-DR-A-IND-FL

Form Factor: QSFP28 TX Wavelength: 1310nm Reach: 500m

Cable Type: SMF Rate Category: 100G Interface Type: DR1 DDM: Yes

Connector Type: Dual-LC


Arista Compatible QSFP-100G-DR-A-FL Features


Product Description

The FluxLight Arista Compatible QSFP-100G-DR-A-FL is a transceiver module designed for 500m optical communication applications. The module incorporates one channel optical signal, on 1310nm center wavelength, operating at 50Gbaud data rate. The transmitter path incorporates an EML Driver and a cooled EML together. On the receiver path, the input optical signal is coupled to a Pin photodiode detector. A DSP based gearbox is used to convert 4x25Gbps NRZ signals to 1x50Gbaud PAM4 signal. Also a 4-channel retimer and FEC block are integrated in this DSP. The electrical interface is compliant with IEEE 802.3cd and QSFP28 MSA in the transmitting and receiving directions, and optical interface is compliant to IEEE 802.3cd and 100G Lambda MSA with Duplex LC connector. The module has a maximum power consumption of 3.5W.


The product is designed with form factor, optical/electrical connection, and digital diagnostic interface according to the QSFP28 Multi-Source Agreement (MSA). It has been designed to meet the harshest external operating conditions including temperature, humidity, and EMI interference.

Functional Description

This product converts the 4-channel of 100Gbps aggregated NRZ electrical input data into one channel of 50Gbaud PAM4 optical signal (light) on 1310nm center wavelength through a DSP based gearbox, by a driven cooled Electro-absorption Modulated DFB Laser (EML). The light propagates out of the transmitter into an SMF fiber. The receiver module accepts the 50Gbaud PAM4 optical signal input, and converts it into a 50Gbaud PAM4 electrical signal via a linear amplifier. And then convert the 50Gbaud PAM4 signal into 4 channels of 25Gbps NRZ signals. Figure 1 shows the functional block diagram of this product.


A single +3.3V power supply is required to power up this product. Both power supply pins VccTx and VccRx are internally connected and should be applied concurrently. As per MSA specifications the module offers seven low speed hardware control pins (including the 2-wire serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL and IntL.


Module Select (ModSelL) is an input pin. When held low by the host, this product responds to 2- wire serial communication commands. The ModSelL allows the use of this product on a single 2- wire interface bus – individual ModSelL lines must be used.

Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus communication interface and enable the host to access the memory map.


The ResetL pin enables a complete reset, returning the settings to their default state, when a low level on the ResetL pin is held for longer than the minimum pulse length. During the execution of a reset the host shall disregard all status bits until it indicates a completion of the reset interrupt. The product indicates this by posting an IntL (Interrupt) signal with the Data_Not_Ready bit negated in the memory map. Note that on power up (including hot insertion) the module should post this completion of reset interrupt without requiring a reset.


Low Power Mode (LPMode) pin is used to set the maximum power consumption for the product in order to protect hosts that are not capable of cooling higher power modules, should such modules be accidentally inserted.


Module Present (ModPrsL) is a signal local to the host board which, in the absence of a product, is normally pulled up to the host Vcc. When the product is inserted into the connector, it completes the path to ground through a resistor on the host board and asserts the signal. ModPrsL then indicates its present by setting ModPrsL to a “Low” state.


Interrupt (IntL) is an output pin. “Low” indicates a possible operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin is an open collector output and must be pulled to the Host Vcc voltage on the Host board.

Transceiver Block Diagram

Diagram Description automatically generated

Figure 1. Transceiver Block Diagram


ABSOLUTE MAXIMUM RATINGS

The operation in excess of any absolute maximum ratings might cause permanent damage to this module.


Parameter

Symbol

Min

Max

Unit

Notes

Storage Temperature

TS

-40

85

degC


Operating Case Temperature - Commercial

TOP

0

70

degC


Operating Case Temperature – Extended

TOP

-5

85

degC


Operating Case Temperature - Industrial

TOP

-40

85

degC


Power Supply Voltage

VCC

-0.5

3.6

V


Relative Humidity (non-condensation)

RH

0

85

%


Damage Threshold, each Lane

THd

6.5


dBm



RECOMMENDED OPERATING CONDITIONS


Parameter

Symbol

Min

Typical

Max

Unit

Notes

Operating Case Temperature - Commercial

TOP

0

70

degC



Operating Case Temperature – Extended

TOP

-5

85

degC



Operating Case Temperature - Industrial

TOP

-40

85

degC



Power Supply Voltage

VCC

3.135

3.3

3.465

V


Electrical Data Rate, each Lane(NRZ)



25.78125


Gb/s


Optical Data Rate (PAM4)



53.125


GBd


Data Rate Accuracy


-100


100

ppm


Pre-FEC Bit Error Ratio




2.4x10-4



Post-FEC Bit Error Ratio




1x10-12


1

Control Input Voltage High


2


Vcc

V


Control Input Voltage Low


0


0.8

V


Link Distance with G.652

D

0.002


500

m

2

Notes:

  1. FEC feature is embedded in the module.

  2. FEC required to be turned on to support maximum transaction distance.

    Electrical Characteristics

    The following electrical characteristics are defined over the Recommended Operating Environment unless otherwise specified.


    Parameter

    Test Point

    Min

    Typica l

    Max

    Unit

    Notes

    Power Consumption




    4.5

    W


    Supply Current

    Icc



    1.36

    A


    Transmitter (each Lane)

    Overload Differential Voltage pk-pk

    TP1a

    900



    mV


    Common Mode Voltage (Vcm)

    TP1

    -350


    2850

    mV

    1

    Differential Termination Resistance Mismatch

    TP1



    10

    %

    At 1MHz


    Differential Return Loss (SDD11)


    TP1



    See CEI- 28G-VSR

    Equation 13-19


    dB


    Common Mode to Differential conversion and Differential to

    TP1



    See CEI- 28G-VSR

    dB


    Power Consumption




    4.5

    W


    Supply Current

    Icc



    1.36

    A


    Common Mode conversion (SDC11, SCD11)




    Equation 13-20




    Stressed Input Test


    TP1a

    See CEI- 28G-VSR

    Section 13.3.11.2.

    1





    Receiver (each Lane)

    Differential Voltage, pk-pk

    TP4



    900

    mV


    Common Mode Voltage (Vcm)

    TP4

    -350


    2850

    mV

    1

    Common Mode Noise, RMS

    TP4



    17.5

    mV


    Differential Termination Resistance Mismatch

    TP4



    10

    %

    At 1MHz


    Differential Return Loss (SDD22)


    TP4



    See CEI- 28G-VSR

    Equation 13-19


    dB


    Common Mode to Differential conversion and Differential to

    Common Mode conversion (SDC22, SCD22)


    TP4



    See CEI- 28G-VSR

    Equation 13-21


    dB


    Common Mode Return Loss (SCC22)

    TP4



    -2

    dB

    2

    Transition Time, 20 to 80%

    TP4

    9.5



    ps


    Vertical Eye Closure (VEC)

    TP4



    5.5

    dB


    Eye Width at 10-15 probability (EW15)

    TP4

    0.57



    UI


    Eye Height at 10-15 probability (EH15)

    TP4

    228



    mV


    Notes:

    1. Vcm is generated by the host. Specification includes effects of ground offset voltage.

    2. From 250MHz to 30GHz.

      Optical Characteristics


      Parameter

      Symbol

      Min

      Typical

      Max

      Unit

      Notes


      Wavelength Assignment

      L0

      1294.53

      1295.56

      1296.59

      nm


      L1

      1299.02

      1300.05

      1301.09

      nm


      L2

      1303.54

      1304.58

      1305.63

      nm


      L3

      1308.09

      1309.14

      1310.19

      nm


      Transmitter

      Center Wavelength

      λt

      1304.5


      1317.5

      nm


      Side Mode Suppression Ratio

      SMSR

      30



      dB


      Average Launch Power

      PAVG

      -2.4


      4

      dBm

      1

      Outer Optical Modulation

      Amplitude (OMAouter)

      POMA

      -0.3


      4.2

      dBm

      2

      Launch Power in OMAouter minus Transmitter and Dispersion Eye Closure

      (TDECQ)



      -1.3




      dBm


      Transmitter and Dispersion Eye Closure for PAM4 (TDECQ)

      TDECQ



      2.5

      dB


      Extinction Ratio

      ER

      5



      dB


      RIN15.5OMA

      RIN



      -136

      dB/Hz


      Optical Return Loss Tolerance

      TOL



      15.5

      dB


      Transmitter Reflectance

      RT



      -26

      dB


      Average Launch Power OFF Transmitter, each Lane

      Poff



      -15

      dBm


      Receiver

      Center Wavelength

      λr

      1304.5


      1317.5

      nm


      Damage Threshold

      THd

      6.5



      dBm

      3

      Average Receive Power


      -5.4


      4

      dBm


      Receive Power (OMAouter)




      4.2

      dBm


      Receiver Sensitivity (OMAouter)

      SEN



      -4.4

      dBm

      for BER=

      2.4x10-4

      Stressed Receiver Sensitivity (OMAouter)

      SRS



      -1.9

      dBm

      4

      Receiver Reflectance

      RR



      -26

      dB


      LOS Assert

      LOSA

      -30



      dBm


      LOS Deassert

      LOSD



      -15

      dBm


      LOS Hysteresis

      LOSH

      0.5



      dB


      Conditions of Stress Receiver Sensitivity Test (Note 5)

      Stressed Eye Closure for PAM4 (SECQ)



      2.5


      dB


      Notes:

      1. Average launch power, each lane min is informative and not the principal indicator of signal strength. A transmitter with launch power below this value cannot be compliant; however, a value above this does not ensure compliance

      2. Even if the TDECQ < 1.4dB for an extinction ratio of ≥ 4.5dB or TDECQ < 1.3dB for an extinction ratio of < 4.5dB, the OMAouter (min) must exceed the minimum value specified here.

      3. The receiver shall be able to tolerate, without damage, continuous exposure to a modulated optical input signal having this power level on one lane. The receiver does not have to operate correctly at this input power.

      4. Measured with conformance test signal for BER = 2.4x10-4. A compliant receiver shall have stressed receiver sensitivity (OMAouter) values below the mask of Figure 4, for SECQ values between 0.9 and 3.4 dB.

      5. Stressed eye closure

Digital Diagnostic Functions

The following digital diagnostic characteristics are defined over the normal operating conditions unless otherwise specified.


Parameter

Symbol

Min

Max

Unit

Notes

Temperature monitor absolute error


DMI_Temp


-3


3


degC

Over operating temperature range

Supply voltage monitor absolute error

DMI _VCC

-0.1

0.1

V

Over full operating range

Channel RX power monitor absolute error


DMI_RX_Ch


-2


2


dB


1

Channel Bias current monitor

DMI_Ibias_Ch

-10%

10%

mA


Channel TX power monitor absolute error

DMI_TX_Ch

-2

2

dB

1

Notes:

  1. Due to measurement accuracy of different single mode fibers, there could be an additional +/-1 dB fluctuation, or a +/- 3 dB total accuracy.


PIN Assignment and Description


Table Description automatically generated with medium confidence

Figure 2. MSA Compliant Connector



PIN #

Logic

Symbol

Description

Notes

1


GND

Ground

1

2

CML-I

Tx2n

Transmitter Inverted Data Input


3

CML-I

Tx2p

Transmitter Non-Inverted Data output


4


GND

Ground

1

5

CML-I

Tx4n

Transmitter Inverted Data Input


6

CML-I

Tx4p

Transmitter Non-Inverted Data output


7


GND

Ground

1

8

LVTLL-I

ModSelL

Module Select


9

LVTLL-I

ResetL

Module Reset


10


VccRx

+3.3V Power Supply Receiver

2

11

LVCMOS-I/O

SCL

2-Wire Serial Interface Clock


12

LVCMOS-I/O

SDA

2-Wire Serial Interface Data


13


GND

Ground


14

CML-O

Rx3p

Receiver Non-Inverted Data Output


15

CML-O

Rx3n

Receiver Inverted Data Output


16


GND

Ground

1

17

CML-O

Rx1p

Receiver Non-Inverted Data Output


18

CML-O

Rx1n

Receiver Inverted Data Output


19


GND

Ground

1

20


GND

Ground

1

21

CML-O

Rx2n

Receiver Inverted Data Output


22

CML-O

Rx2p

Receiver Non-Inverted Data Output


23


GND

Ground

1

24

CML-O

Rx4n

Receiver Inverted Data Output

1

25

CML-O

Rx4p

Receiver Non-Inverted Data Output


26


GND

Ground

1

27

LVTTL-O

ModPrsL

Module Present


28

LVTTL-O

IntL

Interrupt


29


VccTx

+3.3 V Power Supply transmitter

2

30


Vcc1

+3.3 V Power Supply

2

31

LVTTL-I

LPMode

Low Power Mode


32


GND

Ground

1

33

CML-I

Tx3p

Transmitter Non-Inverted Data Input


34

CML-I

Tx3n

Transmitter Inverted Data Output


35


GND

Ground

1

36

CML-I

Tx1p

Transmitter Non-Inverted Data Input


37

CML-I

Tx1n

Transmitter Inverted Data Output


38


GND

Ground

1

Notes:

  1. GND is the symbol for signal and supply (power) common for QSFP28 modules. All are common within the QSFP28 module and all module voltages are referenced to this potential unless otherwise noted. Connect these directly to the host board signal common ground plane.

  2. VccRx, Vcc1 and VccTx are the receiving and transmission power suppliers and shall be applied concurrently. Recommended host board power supply filtering is shown in Figure

  3. 3 below. Vcc Rx, Vcc1 and Vcc Tx may be internally connected within the QSFP28 transceiver module in any combination.

Recommended Power Supply Filter


Diagram, schematic Description automatically generated


Figure 3. Recommended Power Supply Filter


Mechanical Dimension


Diagram Description automatically generated with medium confidence

Figure 4. Mechanical Outline

ESD

This transceiver is specified as ESD threshold 1kV for high-speed data pins and 2kV for all other electrical input pins, tested per MIL-STD-883, Method 3015.4 /JESD22-A114-A (HBM). However, normal ESD precautions are still required during the handling of this module. This transceiver is shipped in ESD protective packaging. It should be removed from the packaging and handled only in an ESD protected environment.


Laser Safety

This is a Class 1 Laser Product according to EN 60825-1:2014. This product complies with 21 CFR 1040.10 and 1040.11 except for deviations pursuant to Laser Notice No. 50, dated (June 24, 2007).


Caution: Use of controls or adjustments or performance of procedures other than those specified herein may result in hazardous radiation exposure.


Licensing

The following U.S. patents are licensed by Finisar to FluxLight, Inc.:

U.S. Patent Nos: 7,184,668, 7,079,775, 6,957,021, 7,058,310, 6,952,531, 7,162,160, 7,050,720