Cisco Compatible QSFP-100G-SR1.2-FL Quick Spec:
Part Number: QSFP28-100GBase-SR1.2 QSFP28-100GBase-SR1.2-EXT QSFP28-100GBase-SR1.2-IND
Form Factor: QSFP28
TX Wavelength: 850nm/910nm
Reach: 100m
Cable Type: OM4 MMF
Rate Category: 100GBase
Interface Type: SR1.2
DDM: Yes
Connector Type: Dual-LC
Cisco Compatible QSFP-100G-SR1.2-FL Features:
4 independent full-duplex channels
Up to 28Gbps data rate per channel
QSFP28 MSA compliant
Up to 100m over OM4 MMF transmission
Up to 70m over OM3 MMF transmission
Single 3.3V power supply
Maximum power consumption 3.5W
MTP/MPO optical connector
RoHS-6 compliant
Operating Case Temperature
Standard: 0°C to +70 °C
Extended -5°C to +85 °C
Industrial -40°C to +85 °C
Cisco Compatible QSFP-100G-SR1.2-FL Applications:
Data Center, Rack to rack
Infiniband HDR
100G Ethernet
Cisco Compatible QSFP-100G-SR1.2-FL General Description
This product can support 100Gb/s bit rates. It is a parallel Quad Small Form-factor Pluggable (QSFP28) Bi-Direction optical module. The module integrates four host electrical data into two optical lanes (by Dual Wavelength VCSEL Bi-Directional Optical Interface, 850nm and 910nm) to allow optical communication over a 2-fiber duplex LC optical multi-mode fiber. Reversely, on the receiver side, the module de-multiplexes 2 sets of optical input signal and converts them to 4 channels of electrical data.
An optical fiber ribbon cable with an LC connector can be plugged into the QSFP28 module receptacle. Proper alignment is ensured by the guide pins inside the receptacle. The cable usually cannot be twisted for proper channel to channel alignment. Electrical connection is achieved through an MSA-compliant 38-pin edge type connector.
The module operates by a single +3.3V power supply. LVCMOS/LVTTL global control signals, such as Module Present, Reset, Interrupt and Low Power Mode, are available with the modules. A 2-wire serial interface is available to send and receive more complex control signals, and to receive digital diagnostic information. Individual channels can be addressed and unused channels can be shut down for maximum design flexibility.
The product is designed with form factor, optical/electrical connections, and digital diagnostic interface according to the QSFP28 Multi-Source Agreement (MSA). It has been designed to meet the harshest external operating conditions including temperature, humidity, and EMI interference. The module offers very high functionality and feature integration, accessible via a two-wire serial interface.
Functional Description
This product can support 100Gb/s bit rates. It is a parallel Quad Small Form-factor Pluggable (QSFP28) Bi-Direction optical module. The module integrates four host electrical data into two optical lanes (by Dual Wavelength VCSEL Bi- Directional Optical Interface, 850nm and 900nm) to allow optical communication over a 2-fiber duplex LC optical multi- mode fiber. Reversely, on the receiver side, the module de-multiplexes 2 sets of optical input signal and converts them to 4 channels of electrical data. The receiver module outputs electrical signals are also voltage compatible with Common Mode Logic (CML) levels. Figure 1 shows the functional block diagram of this product.
A single +3.3V power supply is required to power up the module. Both power supply pins VccTx and VccRx are internally connected and should be applied concurrently. As per MSA specifications the module offers 7 low speed hardware control pins (including the 2-wire serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL and IntL.
Module Select (ModSelL) is an input pin. When held low by the host, the module responds to 2-wire serial communication commands. The ModSelL allows the use of multiple QSFP28 modules on a single 2-wire interface bus – individual ModSelL lines for each QSFP28 module must be used.
Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus communication interface and enable the host to access the QSFP28 memory map.
The ResetL pin enables a complete module reset, returning module settings to their default state, when a low level on the ResetL pin is held for longer than the minimum pulse length. During the execution of a reset the host shall disregard all status bits until the module indicates a completion of the reset interrupt. The module indicates this by posting an IntL (Interrupt) signal with the Data_Not_Ready bit negated in the memory map. Note that on power up (including hot insertion) the module should post this completion of reset interrupt without requiring a reset.
Low Power Mode (LPMode) pin is used to set the maximum power consumption for the module to protect hosts that are not capable of cooling higher power modules, should such modules be accidentally inserted.
Module Present (ModPrsL) is a signal local to the host board which, in the absence of a module, is normally pulled up to the host Vcc. When a module is inserted into the connector, it completes the path to ground through a resistor on the host board and asserts the signal. ModPrsL then indicates a module is present by setting ModPrsL to a “Low” state.
Interrupt (IntL) is an output pin. Low indicates a possible module operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin is an open collector output and must be pulled to the Host Vcc voltage on the Host board
.
Transceiver Block Diagram
Pin Assignment and Description
PIN | Logic | Symbol | Name/ Description | Notes |
1 | GND | Ground | 1 | |
2 | CML- I | Tx2n | Transmitter Inverted Data Input | |
3 | CML- I | Tx2p | Transmitter Non- Inverted Data output | |
4 | GND | Ground | 1 | |
5 | CML- I | Tx4n | Transmitter Inverted Data Input | |
6 | CML- I | Tx4p | Transmitter Non- Inverted Data output | |
7 | GND | Ground | 1 | |
8 | LVTLL- I | ModSelL | Module Select | |
9 | LVTLL- I | ResetL | Module Reset | |
10 | VccRx | +3.3V Power Supply Receiver | 2 | |
11 | LVCMOS-I/O | SCL | 2 - Wire Serial Interface Clock | |
12 | LVCMOS-I/O | SDA | 2 - Wire Serial Interface Data | |
13 | GND | Ground | ||
14 | CML- O | Rx3p | Receiver Non- Inverted Data Output | |
15 | CML- O | Rx3n | Receiver Inverted Data Output | |
16 | GND | Ground | 1 | |
17 | CML- O | Rx1p | Receiver Non- Inverted Data Output | |
18 | CML- O | Rx1n | Receiver Inverted Data Output | |
19 | GND | Ground | 1 | |
20 | GND | Ground | 1 | |
21 | CML- O | Rx2n | Receiver Inverted Data Output | |
22 | CML- O | Rx2p | Receiver Non- Inverted Data Output | |
23 | GND | Ground | 1 | |
24 | CML- O | Rx4n | Receiver Inverted Data Output | 1 |
25 | CML- O | Rx4p | Receiver Non- Inverted Data Output | |
26 | GND | Ground | 1 | |
27 | LVTTL- O | ModPrsL | Module Present | |
28 | LVTTL- O | IntL | Interrupt | |
29 | VccTx | + 3.3 V Power Supply transmitter | 2 | |
30 | Vcc1 | +3.3 V Power Supply | 2 | |
31 | LVTTL- I | LPMode | Low Power Mode |
32 | GND | Ground | 1 | |
33 | CML- I | Tx3p | Transmitter Non- Inverted Data Input | |
34 | CML- I | Tx3n | Transmitter Inverted Data Output | |
35 | GND | Ground | 1 | |
36 | CML- I | Tx1p | Transmitter Non- Inverted Data Input | |
37 | CML- I | Tx1n | Transmitter Inverted Data Output | |
38 | GND | Ground | 1 |
Notes:
GND is the symbol for signal and supply ( power) common for QSFP28 modules. All are common within the QSFP2 8 module and all module voltages are referenced to this potential unless otherwise noted. Connect these directly to the host board signal common ground plane.
VccRx, Vcc1 and VccTx are the receiver and transmitter power suppliers and shall be applied concurrently. Recommended host board power supply filtering is shown in Figure 4 below. Vcc Rx, Vcc1 and Vcc Tx may be internally connected within the QSFP2 8 transceiver module in any combination. The connector pins are each rated for a maximum current of 1000 mA.
Absolute Maximum Ratings
Parameter | Symbol | Min | Max | Unit |
Storage Temperature | Ts | -40 | +85 | °C |
Operating Case Temp (Standard) | TOP | 10 | 70 | °C |
Operating Case Temp (Industrial) | TOP | -40 | 85 | °C |
Power Supply Voltage | Vcc | -0.5 | 3.6 | V |
Relative Humidity (non-cond.) | RH | 0 | 85 | % |
Damage Threshold, each lane | THd | 5 | dBm |
Recommended Operating Conditions
Parameter | Symbol | Min | Typ | Max | Unit | Note |
Operating Case Temp | TOP | 10 | 70 | °C | ||
Power Supply Voltage | Vcc | 3.135 | 3.3 | 3.465 | V |
Data Rate Accuracy | -100 | 100 | ppm | |||
Pre-FEC Bit Error Rate | 2.4x10-4 | |||||
Post-FEC Bit Error Rate | 1x10-12 | 1 | ||||
Control Input Voltage High) | 2 | Vcc | V | |||
Control Input Voltage Low | 0 | 0.8 | V | |||
Link Distance | OM3 D1 | 70 | m | 2 | ||
OM4 D2 | 100 | m | 2 | |||
OM5 D3 | 150 | m | 2 |
Notes:
FEC provided by host system.
FEC required on host system to support maximum distance.
Recommended Power Supply Filter
Electrical Characteristics
Parameter | Symbol | Min | Typ | Max | Unit |
Power Consumption | 4 | W | |||
Supply Current | Icc | 1.21 | A |
Electrical Characteristics-Transmitter (each lane)
Parameter | Symbol | Min | Typ | Max | Unit | Notes |
Overload Differential Voltage pk- pk | TP1 a | 900 | mV | |||
Common Mode Voltage (Vcm) | TP1 | -350 | 2850 | mV | 1 | |
Differential Termination Resistance Mismatch | TP1 | 10 | % | At 1MHz | ||
Differential Return Loss (SDD11) | TP1 | See CEI- 28G-VSR Equ. 13-19 | dB | |||
Common Mode to Differential conversion and Differential to Common Mode conversion ( SDC11, SCD11) | TP1 | See CEI- 28G-VSR Equation 13-20 | dB | |||
Stressed Input Test | TP1 a | See CEI- 28G-VSR Section 13.3.11.2.1 |
Electrical Characteristics-Receiver (each lane)
Parameter | Symbol | Min | Typ | Max | Unit | Notes |
Differential Voltage, pk- pk | TP4 | 900 | mV | |||
Common Mode Voltage (Vcm) | TP4 | -350 | 2850 | mV | 1 | |
Common Mode Noise, RMS | TP4 | 17.5 | mV | |||
Differential Termination Resistance Mismatch | TP4 | 10 | % | At 1MHz |
Differential Return Loss (SDD22) | TP4 | See CEI- 28G-VSR Equation 13-19 | dB | |||
Common Mode to Differential conversion and Differential to Common Mode conversion ( SDC22, SCD22) | TP4 | See CEI- 28G-VSR Equation 13-21 | dB | |||
Common Mode Return Loss (SCC22) | TP4 | -2 | dB | 2 | ||
Transition Time, 20 to 80% | TP4 | 9.5 | ps | |||
Vertical Eye Closure ( VEC) | TP4 | 5.5 | dB | |||
Eye Width at 10-15 probability (EW15) | TP4 | 0.57 | UI | |||
Eye Height at 10-15 probability (EH15) | TP4 | 228 | mV |
Notes:
Vcm is generated by the host. Specification includes effects of ground offset voltage.
From 250MHz to 30GHz.
Optical Characteristics-Transmitter
Parameter | Symbol | Min | Typ | Max | Unit | Notes |
Center Wavelength Line0 | λC | 844 | 863 | nm | ||
Center Wavelength Line1 | λC | 900 | 918 | nm | ||
RMS Spectral Width | ∆λrms | λ1: | nm | |||
0. | ||||||
6 | ||||||
λ2: | ||||||
0.65 | ||||||
Average Launch Power, each Lane | PAVG | -6.2 | 4 | dBm | ||
Optical Modulation Amplitude (OMA), each Lane | POMA | -4.2 | 3 | dBm | 1 | |
Peak Power, each lane | - - | dBm | ||||
Launch power in OMA minus TDP, each lane | -5.6 | dBm |
TDECQ, each lane | 4.5 | dB | ||||
Extinction Ratio | ER | 3.0 | dB | |||
Transmitter transition time, each lane (max) | 31 | ps | ||||
RIN12 OMA | -128 | dB/Hz | ||||
Optical Return Loss Tolerance | TOL | 12 | dB | |||
Average Launch | Poff | -30 | dBm | |||
Power OFF Transmitter, each Lane | ||||||
Encircled Flux | ≥ 86% at 19 μm ≤ 30% at 4.5 μm | 2 | ||||
Signaling rate, each lane | 26.5625± 100ppm | Gbd/s |
Optical Characteristics-Receiver
Parameter | Symbol | Min | Typ | Max | Unit | Notes |
Center Wavelength Lane0 | λC | 844 | 850 | 863 | nm | |
Center Wavelength Lane1 | λC | 900 | 910 | 918 | nm | |
Damage Threshold, each Lane | THd | 5 | dBm | 3 | ||
Average Receive Power, each lane | -8.2 | dBm | 4 | |||
Average power at receiver input, each lane (overload) | 4 | dBm | ||||
Receiver Reflectance | RR | -12 | dB | |||
Stressed receiver sensitivity in OMA, Lane2 | -3.5 | dBm | 5 | |||
Receiver sensitivity(OMA outer), each lane | Max (- 6.6, SECQ – 8) as per IEEE cl 150 | dBm | ||||
LOS Assert | LOSA | -30 | -14.2 | dBm | ||
LOS Deassert | LOSD | -11.2 | dBm | |||
LOS Hysteresis | LOSH | 0.5 | dB |
Notes:
Even if the mTDEC<0.9 dB, the OMA (min) must exceed this value.
If measured into type A1a.2 50um fiber in accordance with IEC 61280-1-4.
The receiver shall be able to tolerate, without damage, continuous exposure to a modulated optical input signal having this power level on one lane. The receiver does not have to operate correctly at this input power.
Average receive power, each lane (min) is informative and not the principal indicator of signal strength. A received power below this value cannot be compliant; however, a value above this does not ensure compliance.
Measured with conformance test signal at TP3 as per following:
Stressed eye closure (SECq), each lane | 4.5 | dB |
OMA of each aggressor, each lane | 3 | dBm |
Digital Diagnostic Functions
The following digital diagnostic characteristics are defined over the normal operating conditions unless otherwise specified.
Parameter | Symbol | Min | Typ | Max | Unit | Notes |
Temperature monitor absolute error | DMI TEMP | -3 | 3 | deg. C | Over operating temperature range | |
Supply voltage monitor absolute error | DMI VCC | -0.15 | 0.15 | V | Over Full operating range | |
Channel RX power monitor absolute error | DMIRX_CH | -2 | 2 | dB | 1 | |
Channel Bias current monitor | DMIIbias_CH | -10% | 10% | mA | ||
Channel TX power monitor absolute error | DMITX_CH | -2 | 2 | dB | 1 |
Notes:
Due to measurement accuracy of different single mode fibers, there could be an additional +/-1 dB fluctuation, or a +/- 3 dB total accuracy.
Mechanical Dimensions
ESD
This transceiver is specified as ESD threshold 1 kV for high- speed data pins and 2 kV for all others electrical input pins, tested per MIL-STD-883, Method 3015.4 /JESD22- A114-A (HBM). However, normal ESD precautions are still required during the handling of this module. This transceiver is shipped in ESD protective packaging. It should be removed from the packaging and handled only in an ESD protected environment.
Laser Safety
This is a Class 1M Laser Product according to EN 60825-1:2014. This product complies with 21 CFR 1040. 10 except for deviations pursuant to Laser Notice No. 50, dated (June 24, 2007).
Licensing
The following U.S. patents are licensed by Finisar to FluxLight, Inc.: U.S. Patent Nos: 7,184,668, 7,079,775, 6,957,021, 7,058,310, 6,952,531, 7,162,160, 7,050,720