Finisar Compatible FTLC9152RGPL-FL Quick Spec:
FTLC9152RGPL-EXT-FL FTLC9152RGPL-IND-FL
Form Factor: QSFP28
TX Wavelength: SWDM4
Reach: 150m
Cable Type: OM4 MMF
Rate Category: 100GBase
Interface Type: SWDM4
DDM: Yes
Connector Type: Dual-LC
Finisar Compatible FTLC9152RGPL-FL Features:
Compliant with QSFP28 MSA
Compliant with SWDM MSA
Supports 103 Gbps aggregate bit rate
Up to 150m reach for OM5 MMF
Single +3.3V power supply
Transmitter: 4x25Gb/s 850mm VCSEL-based (850nm, 880nm, 910nm, 940nm)
Receiver: 4x25 Gb/s PIN ROSA
4x25 Gb/s Compliant with IEEE802.3bm CAUI-4
Maximum power consumption 3.5W
RoHS-6 compliant (lead-free)
Duplex LC receptacle
I2C interface with integrated Digital Diagnostic Monitoring
Operating Case Temperature
Standard: 0°C to +70 °C
Extended -5°C to +85 °C
Industrial -40°C to +85 °C
Finisar Compatible FTLC9152RGPL-FL Applications:
100G Ethernet links
Finisar Compatible FTLC9152RGPL-FL Overview
The 100G QSFP28 SWDM4 transceiver modules are designed for use in 100G Ethernet links over duplex multimode fiber. Four channels/lanes in the 850-940nm region @ 25.78Gbps to transport the Ethernet signal. Digital diagnostics functions are available via an I2C interface, as specified by the QSFP28 MSA.
Specifications:
Absolute Maximum Ratings
Parameter | Symbol | Min | Max | Unit |
Storage Temperature | Ts | -40 | +85 | °C |
Operating Case Temp (Standard) | TOP | 0 | 70 | °C |
Operating Case Temp (Industrial) | TOP | -40 | 85 | °C |
Power Supply Voltage | Vcc | -0.5 | 3.6 | V |
Relative Humidity (non-condensation) | RH | 5 | 85 | % |
Recommended Operating Conditions
Parameter | Symbol | Min | Max | Unit |
Power Supply Voltage | Vcc | 3.135 | 3.465 | V |
Power Consumption | P | 3.5 | W | |
Link Distance on OM3 MMF | 75 | m | ||
Link Distance on OM3 MMF | 100 | m | ||
Link Distance on OM3 MMF | 150 | m |
Electrical Characteristics
Parameter | Symbol | Min | Typ | Max | Unit |
Power Consumption | - | 4.5 | W | ||
Supply Current | Icc | 1.21 | A |
Electrical Characteristics – Transmitter (each lane)
Parameter | Min | Typ | Max | Unit |
Signaling rate per lane (range) | 25.78125 ±100 ppm | GBd | ||
Differential input return loss | Equation (83E–5) | dB | ||
Differential to common mode input return loss | Equation (83E–6) | dB | ||
Differential termination mismatch | 10 | % | ||
Module stressed input test | See 83E3.4.1 | |||
Differential pk-pk input voltage tolerance | 900 | mV | ||
DC common mode voltage | -350 | 2850 | mV | |
Single ended voltage tolerance range | -0.4 | 3.3 | V | |
Electrical Characteristics-Receiver
Parameter | Min | Typ | Max | Unit |
Signaling rate per lane (range) | 25.78125 ±100 ppm | GBd | ||
Differential Output Impedance | 85 | 100 | 115 | ohm |
AC common-mode output voltage (RMS) | 17.5 | mV | ||
Differential output voltage | 900 | mV | ||
Eye width | 0.57 | UI | ||
Eye height, differential | 228 | mV | ||
Vertical eye closure | 5.5 | dB | ||
Differential output return loss | Equation (83E–2) | dB | ||
Common to differential mode conversion return loss | Equation (83E–3) | dB | ||
Differential termination mismatch | 10 | % | ||
Transition time (20% to 80%) | 12 | ps | ||
DC common mode voltage | -350 | 2850 | mV | |
Optical Characteristics-Transmitter
Parameter | Lane | Min | Typ | Max | Unit | Notes |
Signaling Speed per Lane | 25.78125±100ppm | Gbps | ||||
Lane Wavelength Range | Lane0 Lane1 Lane2 Lane3 | 844 874 904 934 | 858 888 918 948 | nm | ||
Modulation Format | NRZ | |||||
Difference in launch power between any two lanes | 4.5 | dBm | ||||
RMS Spectral width | 0.59 | nm | 1 | |||
Optical Modulation Amplitude (OMA), each lane | -5.5 | 3 | dBm | 2 | ||
Average Launch Power per Lane @ TX Off State | -30 | dBm | ||||
Launch Power in OMA minus TDEC | Lane0 Lane1 Lane2 Lane3 | -7 -7 -7.4 -7.7 | dBm | |||
Transmitter and Dispersion Eye Closure | Lane0 Lane1 Lane2 Lane3 | 4 4 4.4 4.8 | dB | 3 | ||
Extinction Ratio | 2 | dB | ||||
Optical Return Loss Tolerance | 12 | dB | ||||
Encircled Flux | ≥86% at 19 um ≤30% at 4.5 um | 4 | ||||
Transmitter eye mask definition {X1, X2, X3, Y1, Y2 Y3} Hit ratio 1.5x10-3 hits per sample | {0.3,0.38,0.45,0.35,0.41,0.5} | |||||
Notes:
RMS spectral width is the standard deviation of the spectrum.
The normative lowest value of OMA for a compliant transmitter is ‘Launch power in OMA minus TDEC, each lane (min)’ plus the actual value of ‘TDEC’, but with a value of at least ‘OMA, each lane (min)’.
TDEC is calculated from the measured TDECm using the methods in 3.6. TDECm is measured following the method in IEEE 802.3 clause 95.8.5 using a 12.6 GHz bandwidth reference receiver for all lanes.
If measured into type A1a.2 or type A1a.3 50 um fiber in accordance with IEC 61280-1-4.
Optical Characteristics-Receiver
Parameter | Lane | Min | Typ | Max | Unit | Notes |
Signaling Speed per Lane | 25.78125±100ppm | Gbps | ||||
Lane Wavelength Range | Lane0 Lane1 Lane2 Lane3 | 844 874 904 934 | 858 888 918 948 | nm | ||
Modulation Format | NRZ | |||||
Damage Threshold | 4.4 | dBm | ||||
Avg. Receive Pwr, each lane | Lane0 Lane1 Lane2 Lane3 | -9.5 -9.4 -9.4 -9.4 | 3.4 | dBm | ||
Receiver Power, each lane (OMA) | 3 | dBm | ||||
Receiver Reflectance | -12 | dB | ||||
unStressed Receiver Sensitivity(OMA) | Lane0 Lane1 Lane2 Lane3 | -8.2 -8.4 -8.6 -8.8 | dBm | 1 | ||
RX_Los_Assert | -30 | dBm | ||||
RX_Los_De-ASSERT | -12 | dBm | ||||
RX_Los_Hysteresis | 0.5 | dBm | ||||
Notes:
unstressed sensitivity at BER of 5E-5 (pre FEC)
Digital Diagnostic Functions
The following digital diagnostic characteristics are defined over the normal operating conditions unless otherwise specified.
Parameter | Unit | Specification |
Temperature Monitor | °C | ±3 |
Voltage Monitor | V | ±5% |
I_bias Monitor | mA | ±10% |
Received Power (Rx) Monitor | dB | ±3.0 |
Transmit Power (Tx) Monitor | dB | ±3.0 |
PIN Assignment and Function Definitions
The electrical interface to the transceiver is a 38 pins edge connector. The 38 pins provide high speed data, low speed monitoring and control signals, I2C communication, power and ground connectivity. The top and bottom views of the connector are provided below, as well as a table outlining the contact numbering, symbol and full description.
PIN Definition
PIN | Signal Name | Description |
1 | GND | Ground (1) |
2 | Tx2n | CML-I Transmitter 2 Inverted Data Input |
3 | Tx2p | CML-I Transmitter 2 Non-Inverted Data Input |
4 | GND | Ground (1) |
5 | Tx4n | CML-I Transmitter 4 Inverted Data Input |
6 | Tx4p | CML-I Transmitter 4 Non-Inverted Data Input |
7 | GND | Ground (1) |
8 | ModSelL | LVTLL-I Module Select |
9 | ResetL | LVTLL-I Module Reset |
10 | VCCRx | +3.3V Power Supply Receiver (2) |
11 | SCL | LVCMOS-I/O 2-Wire Serial Interface Clock |
12 | SDA | LVCMOS-I/O 2-Wire Serial Interface Data |
13 | GND | Ground (1) |
14 | Rx3p | CML-O Receiver 3 Non-Inverted Data Output |
15 | Rx3n | CML-O Receiver 3 Inverted Data Output |
16 | GND | Ground (1) |
17 | Rx1p | CML-O Receiver 1 Non-Inverted Data Output |
18 | Rx1n | CML-O Receiver 1 Inverted Data Output |
19 | GND | Ground (1) |
20 | GND | Ground (1) |
21 | Rx2n | CML-O Receiver 2 Inverted Data Output |
22 | Rx2p | CML-O Receiver 2 Non-Inverted Data Output |
23 | GND | Ground (1) |
24 | Rx4n | CML-O Receiver 4 Inverted Data Output |
25 | Rx4p | CML-O Receiver 4 Non-Inverted Data Output |
26 | GND | Ground (1) |
27 | ModPrsL | Module Present |
28 | IntL | Interrupt |
29 | VCCTx | +3.3V Power Supply Transmitter (2) |
30 | VCC1 | +3.3V Power Supply |
31 | LPMode | LVTLL-I Low Power Mode |
32 | GND | Ground (1) |
33 | Tx3p | CML-I Transmitter 3 Non-Inverted Data Input |
34 | Tx3n | CML-I Transmitter 3 Inverted Data Input |
35 | GND | Ground (1) |
36 | Tx1p | CML-I Transmitter 1 Non-Inverted Data Input |
37 | Tx1n | CML-I Transmitter 1 Inverted Data Input |
38 | GND | Ground (1) |
GND is the symbol for signal and supply (power) common for QSFP28 modules. All are common within the QSFP28 module and all module voltages are referenced to this potential unless otherwise noted. Connect these directly to the host board signal common ground plane.
VccRx, Vcc1 and VccTx are the receiving and transmission power suppliers and shall be applied concurrently. Recommended host board power supply filtering is shown below. Vcc Rx, Vcc1 and Vcc Tx may be internally connected within the QSFP28 transceiver module in any combination. The connector pins are each rated for a maximum current of 1000mA.
Memory Map
Compatible with SFF-8836
Mechanical Dimensions
Pull tab color: Gray, Pantone 424U Unit: mm
Licensing
The following U.S. patents are licensed by Finisar to FluxLight, Inc.:
U.S. Patent Nos: 7,184,668, 7,079,775, 6,957,021, 7,058,310, 6,952,531, 7,162,160, 7,050,720