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The JNP-QSFP-100G-LR4-FL is a 103/112 Gbps transceiver module designed for optical communication applications compliant to 100GBASE-LR4 of the IEEE P802.3ba standard and OUT-4. The module converts 4 input channels of 25/28 Gbps electrical data to 4 channels of LAN WDM optical signals and then multiplexes them into a single channel for 103/112 Gbps optical transmission. Reversely on the receiver side, the module de-multiplexes a 103/112 Gbps optical input into 4 channels of LAN WDM optical signals and then converts them to 4 output channels of electrical data. The central wavelengths of the 4 LAN WDM channels are 1295.56, 1300.05, 1304.58 and 1309.14 nm as members of the LAN WDM wavelength grid defined in IEEE 802.3ba. The high-performance cooled LAN WDM EA-DFB transmitters and high sensitivity PIN receivers provide superior performance for 100G applications up to 10km links and compliant to optical interface with IEEE802.3ba Clause 88 100GBASE-LR4 and OUT-4l1-9D1F requirements. The product is designed with form factor, optical/electrical connection and digital diagnostic interface according to the QSFP+ Multi-Source Agreement (MSA).
The operation in excess of any absolute maximum ratings might cause permanent damage to this module.
| Parameter | Symbol | Min | Max | Unit | Notes |
|---|---|---|---|---|---|
| Storage Temperature | TS | -40 | 85 | °C | |
| Operating Case Temperature | TOP | 0 | 70 | °C | |
| Power Supply Voltage | VCC | -0.5 | 3.6 | V | |
| Relative Humidity | RH | 0 | 85 | % | Non-condensing |
| Damage Threshold, each lane | THd | 5.5 | dBm |
| Parameter | Symbol | Min | Typical | Max | Unit |
|---|---|---|---|---|---|
| Operating Case Temperature | TC | 0 | 70 | °C | |
| Data Rate Accuracy | -100 | 100 | ppm | ||
| Control Input Voltage High | VIH | 2 | Vcc | V | |
| Control Input Voltage Low | VIL | 0.8 | V | ||
| Link Distance with G.652 SMF | D | 10 | km |
The following electrical characteristics are defined over the Recommended Operating Environment unless otherwise specified.
| Parameter | Symbol | Min | Typical | Max | Unit |
|---|---|---|---|---|---|
| Supply Voltage | Vcc | 3.135 | 3.465 | V | |
| Supply Current | Icc | 1.15 | A | ||
| Module Total Power | P | 4 | W |
| Parameter | Symbol | Min | Typical | Max | Unit |
|---|---|---|---|---|---|
| Center Wavelength, Lane 0 | λ0 | 1294.53 | 1295.56 | 1296.59 | nm |
| Center Wavelength, Lane 1 | λ1 | 1299.02 | 1300.05 | 1301.09 | nm |
| Center Wavelength, Lane 2 | λ2 | 1303.54 | 1304.58 | 1305.63 | nm |
| Center Wavelength, Lane 3 | λ3 | 1308.09 | 1309.14 | 1310.19 | nm |
| Transmitter | |||||
| Side Mode Suppression Ratio | SMSR | 30 | dB | ||
| Total Average Launch Power | PT | 10.5 | dBm | ||
| Average Launch Power, each lane | PAVG | -4.3 | 4.5 | dBm | |
| Extinction Ratio | ER | 4 | dB | ||
| Average Launch Power OFF Transmitter, each lane | POFF | -30 | dBm | ||
| Receiver | |||||
| Damage Threshold, each lane | THd | 5.5 | dBm | ||
| Average Receive Power, each lane | Pin | -10.6 | 4.5 | dBm | |
| Receiver Sensitivity (OMA), each lane | SEN | -8.6 | dBm | ||
| Receiver Reflectance | RR | -26 | dB | ||
| LOS Assert | LOSA | -24 | dBm | ||
| LOS De-Assert | LOSD | -11.6 | dBm | ||
| LOS Hysteresis | LOSH | 0.5 | dB | ||
The following digital diagnostic characteristics are defined over the normal operating conditions unless otherwise specified.
| Parameter | Symbol | Min | Max | Unit |
|---|---|---|---|---|
| Temperature monitor absolute error | DMI_Temp | -5 | 5 | °C |
| Supply voltage monitor absolute error | DMI_VCC | -0.1 | 0.1 | V |
| Channel RX power monitor absolute error | DMI_RX_Ch | -3 | 3 | dB |
| Channel bias current monitor absolute error | DMI_Ibias_Ch | -10% | 10% | mA |
| Channel TX power monitor absolute error | DMI_TX_Ch | -3 | 3 | dB |
Units: mm
| Pin | Logic | Symbol | Description | Plug Sequence |
|---|---|---|---|---|
| 1 | GND | Ground | 1 | |
| 2 | CML-I | Tx2n | Transmitter Inverted Data Input | 3 |
| 3 | CML-I | Tx2p | Transmitter Non-Inverted Data Input | 3 |
| 4 | GND | Ground | 1 | |
| 5 | CML-I | Tx4n | Transmitter Inverted Data Input | 3 |
| 6 | CML-I | Tx4p | Transmitter Non-Inverted Data Input | 3 |
| 7 | GND | Ground | 1 | |
| 8 | LVTTL-I | ModSelL | Module Select | 3 |
| 9 | LVTTL-I | ResetL | Module Reset | 3 |
| 10 | VccRx | +3.3V Power Supply Receiver | 2 | |
| 11 | LVCMOS-I/O | SCL | 2-Wire Serial Interface Clock | 3 |
| 12 | LVCMOS-I/O | SDA | 2-Wire Serial Interface Data | 3 |
| 13 | GND | Ground | 1 | |
| 14 | CML-O | Rx3p | Receiver Non-Inverted Data Output | 3 |
| 15 | CML-O | Rx3n | Receiver Inverted Data Output | 3 |
| 16 | GND | Ground | 1 | |
| 17 | CML-O | Rx1p | Receiver Non-Inverted Data Output | 3 |
| 18 | CML-O | Rx1n | Receiver Inverted Data Output | 3 |
| 19 | GND | Ground | 1 | |
| 20 | GND | Ground | 1 | |
| 21 | CML-O | Rx2n | Receiver Inverted Data Output | 3 |
| 22 | CML-O | Rx2p | Receiver Non-Inverted Data Output | 3 |
| 23 | GND | Ground | 1 | |
| 24 | CML-O | Rx4n | Receiver Inverted Data Output | 3 |
| 25 | CML-O | Rx4p | Receiver Non-Inverted Data Output | 3 |
| 26 | GND | Ground | 1 | |
| 27 | LVTTL-O | ModPrsL | Module Present | 3 |
| 28 | LVTTL-O | IntL | Interrupt | 3 |
| 29 | VccTx | +3.3V Power Supply Transmitter | 2 | |
| 30 | Vcc1 | +3.3V Power Supply | 2 | |
| 31 | LVTTL-I | LPMode | Low Power Mode | 3 |
| 32 | GND | Ground | 1 | |
| 33 | CML-I | Tx3p | Transmitter Non-Inverted Data Input | 3 |
| 34 | CML-I | Tx3n | Transmitter Inverted Data Input | 3 |
| 35 | GND | Ground | 1 | |
| 36 | CML-I | Tx1p | Transmitter Non-Inverted Data Input | 3 |
| 37 | CML-I | Tx1n | Transmitter Inverted Data Input | 3 |
| 38 | GND | Ground | 1 |
This transceiver is specified as an ESD threshold of 1kV for the high-speed data pins and 2kV for all other electrical input pins, tested per MIL-STD-883, Method 3015.4 / JESD22-A114-A (Human Body Model). However, normal ESD precautions are still required during the handling of this module. This transceiver is shipped in ESD-protective packaging. It should be removed from the packaging and handled only in an ESD-protected environment.
This is a Class 1 Laser Product according to IEC 60825-1:2007. This product complies with 21 CFR 1040.10 and 1040.11 except for deviations pursuant to Laser Notice No. 50, dated (June 24, 2007).
The following is a list of Finisar Corporation patents Fluxlight has licensed. This licensure recognizes and compensates Finisar for their intellectual property. The JNP-QSFP-100G-LR4-FL, like all Fluxlight optical transceivers, is covered by this license agreement. Therefore, Fluxlight customers can rest assured that all products purchased are fully licensed, and our customers are under no potential liability that may ensue from the use of unlicensed optical transceiver products.
U.S. Patent Numbers: 7,184,668 (System and method of protecting eye safety during operation of a fiber optic transceiver), 7,079,775 (Integrated memory mapped controller circuit for fiber optics transceiver), 6,957,021 (Optical transceiver with memory mapped locations), 7,058,310 (System and method for protecting eye safety during operation of a fiber optic transceiver), 6,952,531 (System and method for protecting eye safety during operation of a fiber optic transceiver), 7,162,160 (System and method for protecting eye safety during operation of a fiber optic transceiver), 7,050,720 (Integrated memory mapped controller circuit for fiber optics transceiver)
Original Equipment Manufacturer (OEM) names may be registered trademarks of the respective OEM, and the OEM has neither authorized nor sponsored the use of its trademark or trade name. All OEM names are used for cross reference/comparative purposes only.
This part is covered by our Limited Lifetime Warranty, a 10-year serviceable lifetime, and our 30-Day Money-Back Guarantee. Read the full warranty and return terms.
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