
QDD-400G-LR4-A-FLT
400G · QSFP-DD · 1271–1331nmSMF · 10km · Duplex LC
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The QDD-400G-LR4-A-FL is a 400Gb/s Quad Small Form Factor Pluggable-double density (QSFP56-DD) optical module designed for 10km optical communication applications. The module converts 8 channels of 50Gb/s (PAM4) electrical input data to 4 channels of CWDM optical signals, and multiplexes them into a single channel for 400Gb/s optical transmission. Reversely, on the receiver side, the module optically de-multiplexes a 400Gb/s optical input into 4 channels of CWDM optical signals and converts them to 8 channels of 50Gb/s (PAM4) electrical output data.
The module incorporates 4 independent channels on CWDM4 1271/1291/1311/1331nm center wavelength, operating at 100G per channel. The transmitter path incorporates a quad channel EML driver and EML lasers together with an optical multiplexer. On the receiver path, an optical de-multiplexer is coupled to a 4 channel photodiode array. A DSP basis gearbox is used to convert 8 channels of 25GBaud PAM4 signals into 4 channels of 50GBaud PAM4 signals and also an 8-channel retimer and FEC block are integrated in this DSP. The electrical interface is compliant with IEEE 802.3bs and QSFP-DD MSA in the transmitting and receiving directions, and the optical interface is compliant to the 100G Lambda MSA 400G-LR4-10 specification with duplex LC connector.

The electrical pinout of the QSFP-DD module is shown in Figure 2 below.


| Pin # | Logic | Symbol | Description | Plug Sequence | Notes |
|---|---|---|---|---|---|
| 1 | GND | Ground | 1B | 1 | |
| 2 | CML-I | Tx2n | Transmitter Inverted Data Input | 3B | |
| 3 | CML-I | Tx2p | Transmitter Non-Inverted Data Input | 3B | |
| 4 | GND | Ground | 1B | 1 | |
| 5 | CML-I | Tx4n | Transmitter Inverted Data Input | 3B | |
| 6 | CML-I | Tx4p | Transmitter Non-Inverted Data Input | 3B | |
| 7 | GND | Ground | 1B | 1 | |
| 8 | LVTTL-I | ModSelL | Module Select | 3B | |
| 9 | LVTTL-I | ResetL | Module Reset | 3B | |
| 10 | VccRx | +3.3V Power Supply Receiver | 2B | 2 | |
| 11 | LVCMOS-I/O | SCL | 2-wire serial interface clock | 3B | |
| 12 | LVCMOS-I/O | SDA | 2-wire serial interface data | 3B | |
| 13 | GND | Ground | 1B | 1 | |
| 14 | CML-O | Rx3p | Receiver Non-Inverted Data Output | 3B | |
| 15 | CML-O | Rx3n | Receiver Inverted Data Output | 3B | |
| 16 | GND | Ground | 1B | 1 | |
| 17 | CML-O | Rx1p | Receiver Non-Inverted Data Output | 3B | |
| 18 | CML-O | Rx1n | Receiver Inverted Data Output | 3B | |
| 19 | GND | Ground | 1B | 1 | |
| 20 | GND | Ground | 1B | 1 | |
| 21 | CML-O | Rx2n | Receiver Inverted Data Output | 3B | |
| 22 | CML-O | Rx2p | Receiver Non-Inverted Data Output | 3B | |
| 23 | GND | Ground | 1B | 1 | |
| 24 | CML-O | Rx4n | Receiver Inverted Data Output | 3B | |
| 25 | CML-O | Rx4p | Receiver Non-Inverted Data Output | 3B | |
| 26 | GND | Ground | 1B | 1 | |
| 27 | LVTTL-O | ModPrsL | Module Present | 3B | |
| 28 | LVTTL-O | IntL | Interrupt | 3B | |
| 29 | VccTx | +3.3V Power supply transmitter | 2B | 2 | |
| 30 | Vcc1 | +3.3V Power supply | 2B | 2 | |
| 31 | LVTTL-I | InitMode | Initialization Mode (called LPMode in legacy QSFP applications) | 3B | |
| 32 | GND | Ground | 1B | 1 | |
| 33 | CML-I | Tx3p | Transmitter Non-Inverted Data Input | 3B | |
| 34 | CML-I | Tx3n | Transmitter Inverted Data Input | 3B | |
| 35 | GND | Ground | 1B | 1 | |
| 36 | CML-I | Tx1p | Transmitter Non-Inverted Data Input | 3B | |
| 37 | CML-I | Tx1n | Transmitter Inverted Data Input | 3B | |
| 38 | GND | Ground | 1B | 1 | |
| 39 | GND | Ground | 1A | 1 | |
| 40 | CML-I | Tx6n | Transmitter Inverted Data Input | 3A | |
| 41 | CML-I | Tx6p | Transmitter Non-Inverted Data Input | 3A | |
| 42 | GND | Ground | 1A | 1 | |
| 43 | CML-I | Tx8n | Transmitter Inverted Data Input | 3A | |
| 44 | CML-I | Tx8p | Transmitter Non-Inverted Data Input | 3A | |
| 45 | GND | Ground | 1A | 1 | |
| 46 | Reserved | For future use | 3A | 3 | |
| 47 | VS1 | Module Vendor Specific 1 | 3A | 3 | |
| 48 | VccRx1 | 3.3V Power Supply | 2A | 2 | |
| 49 | VS2 | Module Vendor Specific 2 | 3A | 3 | |
| 50 | VS3 | Module Vendor Specific 3 | 3A | 3 | |
| 51 | GND | Ground | 1A | 1 | |
| 52 | CML-O | Rx7p | Receiver Non-Inverted Data Output | 3A | |
| 53 | CML-O | Rx7n | Receiver Inverted Data Output | 3A | |
| 54 | GND | Ground | 1A | 1 | |
| 55 | CML-O | Rx5p | Receiver Non-Inverted Data Output | 3A | |
| 56 | CML-O | Rx5n | Receiver Inverted Data Output | 3A | |
| 57 | GND | Ground | 1A | 1 | |
| 58 | GND | Ground | 1A | 1 | |
| 59 | CML-O | Rx6n | Receiver Inverted Data Output | 3A | |
| 60 | CML-O | Rx6p | Receiver Non-Inverted Data Output | 3A | |
| 61 | GND | Ground | 1A | 1 | |
| 62 | CML-O | Rx8n | Receiver Inverted Data Output | 3A | |
| 63 | CML-O | Rx8p | Receiver Non-Inverted Data Output | 3A | |
| 64 | GND | Ground | 1A | 1 | |
| 65 | NC | No Connect | 3A | 3 | |
| 66 | Reserved | For future use | 3A | 3 | |
| 67 | VccTx1 | 3.3V Power Supply | 2A | 2 | |
| 68 | Vcc2 | 3.3V Power Supply | 2A | 2 | |
| 69 | Reserved | For Future Use | 3A | 3 | |
| 70 | GND | Ground | 1A | 1 | |
| 71 | CML-I | Tx7p | Transmitter Non-Inverted Data Input | 3A | |
| 72 | CML-I | Tx7n | Transmitter Inverted Data Input | 3A | |
| 73 | GND | Ground | 1A | 1 | |
| 74 | CML-I | Tx5p | Transmitter Non-Inverted Data Input | 3A | |
| 75 | CML-I | Tx5n | Transmitter Inverted Data Input | 3A | |
| 76 | GND | Ground | 1A | 1 |

It has to be noted that the operation in excess of any individual absolute maximum ratings might cause permanent damage to this module.
| Parameter | Symbol | Min | Max | Units |
|---|---|---|---|---|
| Storage Temperature | TS | -40 | 85 | °C |
| Operating Case Temperature | TOP | 0 | 70 | °C |
| Power Supply Voltage | VCC | -0.5 | 3.6 | V |
| Relative Humidity (non-condensation) | RH | 0 | 85 | % |
| Damage Threshold, each Lane | THd | 5.0 | dBm |
| Parameter | Symbol | Min | Typical | Max | Units | Notes |
|---|---|---|---|---|---|---|
| Operating Case Temperature | TOP | 0 | 70 | °C | ||
| Power Supply Voltage | VCC | 3.135 | 3.3 | 3.465 | V | |
| Data Rate, each Lane | 26.5625 | GBd | PAM4 | |||
| Data Rate Accuracy | -100 | 100 | ppm | |||
| Pre-FEC Bit Error Ratio | 2.4x10-4 | |||||
| Post-FEC Bit Error Ratio | 1x10-12 | 1 | ||||
| Link Distance | D | 0.002 | 10 | km | 2 |
The following electrical characteristics are defined over the Recommended Operating Environment unless otherwise specified.
| Parameter | Test Point | Min | Typical | Max | Units | Notes |
|---|---|---|---|---|---|---|
| Power Consumption | 12 | W | ||||
| Supply Current | Icc | 3.64 | A | |||
| Transmitter (each Lane) | ||||||
| Signaling Rate, each Lane | TP1 | 26.5625 ± 100 ppm | GBd | |||
| Differential pk-pk Input Voltage Tolerance | TP1a | 900 | mVpp | 1 | ||
| Differential Termination Mismatch | TP1 | 10 | % | |||
| Differential Input Return Loss | TP1 | IEEE 802.3-2015 Equation (83E-5) | dB | |||
| Differential to Common Mode Input Return Loss | TP1 | IEEE 802.3-2015 Equation (83E-6) | dB | |||
| Module Stressed Input Test | TP1a | See IEEE 802.3bs 120E.3.4.1 | 2 | |||
| Single-ended Voltage Tolerance Range | TP1a | -0.4 | 3.3 | V | ||
| DC Common Mode Input Voltage | TP1 | -350 | 2850 | mV | 3 | |
| Receiver (each Lane) | ||||||
| Signaling Rate, each lane | TP4 | 26.5625 ± 100 ppm | GBd | |||
| Differential Peak-to-Peak Output Voltage | TP4 | 900 | mVpp | |||
| AC Common Mode Output Voltage, RMS | TP4 | 17.5 | mV | |||
| Differential Termination Mismatch | TP4 | 10 | % | |||
| Differential Output Return Loss | TP4 | IEEE 802.3-2015 Equation (83E-2) | dB | |||
| Common to Differential Mode Conversion Return Loss | TP4 | IEEE 802.3-2015 Equation (83E-3) | dB | |||
| Transition Time, 20% to 80% | TP4 | 9.5 | ps | |||
| Near-end Eye Symmetry Mask Width (ESMW) | TP4 | 0.265 | UI | |||
| Near-end Eye Height, Differential | TP4 | 70 | mV | |||
| Far-end Eye Symmetry Mask Width (ESMW) | TP4 | 0.2 | UI | |||
| Far-end Eye Height, Differential | TP4 | 30 | mV | |||
| Far-end Pre-cursor ISI Ratio | TP4 | -4.5 | 2.5 | % | ||
| Common Mode Output Voltage (Vcm) | TP4 | -350 | 2850 | mV | 3 | |
| Parameter | Symbol | Min | Typical | Max | Units | Notes |
|---|---|---|---|---|---|---|
| Wavelength Assignment | L0 | 1264.5 | 1271 | 1277.5 | nm | |
| L1 | 1284.5 | 1291 | 1297.5 | nm | ||
| L2 | 1304.5 | 1311 | 1317.5 | nm | ||
| L3 | 1324.5 | 1331 | 1337.5 | nm | ||
| Transmitter | ||||||
| Data Rate, each Lane | 53.125 ± 100 ppm | GBd | ||||
| Modulation Format | PAM4 | |||||
| Side-mode Suppression Ratio | SMSR | 30 | dB | |||
| Total Average Launch Power | PT | 10.0 | dBm | |||
| Average Launch Power, each Lane | PAVG | -2.8 | 4.0 | dBm | 1 | |
| Outer Optical Modulation Amplitude (OMAouter), each Lane | POMA | 0.2 | 4.2 | dBm | 2 | |
| Launch Power in OMAouter minus TDECQ, each Lane, for ER ≥ 4.5 dB | -1.2 | dBm | ||||
| Launch Power in OMAouter minus TDECQ, each Lane, for ER < 4.5 dB | -1.1 | dBm | ||||
| Transmitter and Dispersion Eye Closure for PAM4, each Lane | TDECQ | 3.9 | dB | |||
| TDECQ – 10*log10(Ceq), each Lane | 3.9 | dB | 3 | |||
| Extinction Ratio | ER | 3.5 | dB | |||
| Difference in Launch Power between any Two Lanes (OMAouter) | 4 | dB | ||||
| RIN15.6OMA | RIN | -136 | dB/Hz | |||
| Optical Return Loss Tolerance | TOL | 15.6 | dB | |||
| Transmitter Reflectance | RT | -26 | dB | |||
| Transmitter Transition Time | 17 | ps | ||||
| Average Launch Power of OFF Transmitter, each Lane | Poff | -20 | dBm | |||
| Receiver | ||||||
| Data Rate, each Lane | 53.125 ± 100 ppm | GBd | ||||
| Modulation Format | PAM4 | |||||
| Damage Threshold, each Lane | THd | 5.0 | dBm | 5 | ||
| Average Receive Power, each Lane | -9.1 | 4.0 | dBm | 4 | ||
| Receive Power (OMAouter), each Lane | 4.2 | dBm | ||||
| Difference in Receiver Power between any Two Lanes (OMAouter) | 4.6 | dB | ||||
| Receiver Sensitivity (OMAouter), each Lane | SEN | max(−6.6, SECQ − 8.0) | dBm | 6 | ||
| Stressed Receiver Sensitivity (OMAouter), each Lane | SRS | -4.1 | dBm | 7 | ||
| Receiver Reflectance | RR | -26 | dB | |||
| LOS Assert | LOSA | -20 | dBm | |||
| LOS De-assert | LOSD | -12.1 | dBm | |||
| LOS Hysteresis | LOSH | 0.5 | dB | |||
| Stressed Conditions for Stressed Receiver Sensitivity | ||||||
| Stressed Eye Closure for PAM4 (SECQ), Lane under Test | 3.9 | dB | ||||
| SECQ – 10*log10(Ceq), Lane under Test | 3.9 | dB | ||||
| OMAouter of each Aggressor Lane | 0.5 | dBm | ||||

The following digital diagnostic characteristics are defined over the normal operating conditions unless otherwise specified.
| Parameter | Symbol | Min | Max | Units | Notes |
|---|---|---|---|---|---|
| Temperature monitor absolute error | DMI_Temp | -3 | 3 | °C | Over operating temperature range |
| Supply voltage monitor absolute error | DMI_VCC | -0.1 | 0.1 | V | Over full operating range |
| Channel RX power monitor absolute error | DMI_RX_Ch | -2 | 2 | dB | 1 |
| Channel bias current monitor absolute error | DMI_Ibias_Ch | -10 | 10 | % | |
| Channel TX power monitor absolute error | DMI_TX_Ch | -2 | 2 | dB | 1 |

This transceiver is specified as ESD threshold 1kV for high speed data pins and 2kV for all other electrical input pins, tested per MIL-STD-883, Method 3015.4 /JESD22-A114-A (HBM). However, normal ESD precautions are still required during the handling of this module. This transceiver is shipped in ESD protective packaging. It should be removed from the packaging and handled only in an ESD protected environment.
This is a Class 1 Laser Product according to EN 60825-1:2014. This product complies with 21 CFR 1040.10 and 1040.11 except for deviations pursuant to Laser Notice No. 50, dated (June 24, 2007).
Caution: Use of controls or adjustments or performance of procedures other than those specified herein may result in hazardous radiation exposure.
The FluxLight QDD-400G-LR4-A-FL is compatible with the Arista QDD-400G-LR4, which Arista certifies on all its platforms. It works in any Arista switch port that takes the QDD-400G-LR4, running EOS 4.25.2 or later.
The following is a list of Finisar Corporation patents Fluxlight has licensed. This licensure recognizes and compensates Finisar for their intellectual property. The QDD-400G-LR4-A-FL, like all Fluxlight optical transceivers, is covered by this license agreement. Therefore, Fluxlight customers can rest assured that all products purchased are fully licensed, and our customers are under no potential liability that may ensue from the use of unlicensed optical transceiver products.
U.S. Patent Numbers: 7,184,668 (System and method of protecting eye safety during operation of a fiber optic transceiver), 7,079,775 (Integrated memory mapped controller circuit for fiber optics transceiver), 6,957,021 (Optical transceiver with memory mapped locations), 7,058,310 (System and method for protecting eye safety during operation of a fiber optic transceiver), 6,952,531 (System and method for protecting eye safety during operation of a fiber optic transceiver), 7,162,160 (System and method for protecting eye safety during operation of a fiber optic transceiver), 7,050,720 (Integrated memory mapped controller circuit for fiber optics transceiver)
Original Equipment Manufacturer (OEM) names may be registered trademarks of the respective OEM, and the OEM has neither authorized nor sponsored the use of its trademark or trade name. All OEM names are used for cross reference/comparative purposes only.
This part is covered by our Limited Lifetime Warranty, a 10-year serviceable lifetime, and our 30-Day Money-Back Guarantee. Read the full warranty and return terms.
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400G · QSFP-DD · 1271–1331nmSMF · 10km · Duplex LC

400G · QSFP-DD · 1271–1331nmSMF · 10km · Duplex LC

400G · QSFP-DD · 1271–1331nmSMF · 10km · Duplex LC

400G · QSFP-DD · 1271–1331nmSMF · 10km · Duplex LC